1. Field of the Invention
The present invention relates generally to integrated circuits and more specifically to a method of fabricating integrated circuits having fusible elements and interconnects.
2. Description of the Prior Art
The general process of the prior art to form contact areas through an insulation layer onto a substrate includes cleaning the contact area after the aperture is formed. This generally includes degreasing by a suitable solvent followed by the deionized water rinse and a drying step. Unwanted insulating material in the contact area is then removed by, for example, suitable acid etching. This is followed by the application of a metal layer and delineation thereof. The use of the acid as a chemical etch is costly, a possible source of contamination and difficult to perform for wafers of increasing size. As a substitute for cleaning the aperture by chemical etching, sputter etching is becoming common practice in the industry.
Although sputter etching has become standard in the industry, it cannot be used on integrated circuits including thin metal fuses. This is because the sputter etch rate for the insulating material, which is generally silicon dioxide, is slower than the sputter etch rate for the fusible material used in the fuses. Thus, the energy it would take to clear the apertures of residual oxide would completely destroy the desirable properties of the fusible layer if not totally remove the thin film fuse layer itself.
Low energy sputter etching has also become a valuable tool in removing impurities from the surface of a first metal layer so that the second metal layer may make a low resistance contact thereto. However, the use of a low energy sputter etch of the metal layer with the contact apertures exposed also causes redeposit of oxide from the insulation layer into the contact apertures. Another technique for removing impurities of the first metal layer which does not effect the insulation is by applying the second metal layer at a very high temperature. This generally burns off the hydrocarbons or other impurities on the surface of the first metal layer and thus forms a low resistance contact to the second metal layer. By depositing the second metal layer at a high temperature, the crystal structure of the second metal forms hillocks on the second metal layer during sintering. These hillocks could cause undesirable shorts between metallic layers in a two level metal system and undesirable openings in the passivation layer.
Consequently, there exists a need for a process taking advantage of sputter etching in forming an integrated circuit including fusible material and metallic contact metallic layers which allows low resistive contact between the two metallic layers while preventing the formation of hillocks.